Real-Time Operating System Design

RTOS also known as the real time operating system is an operating system (OS) intended to serve real-time application requests.

A key matter of an RTOS is the level of its consistency concerning the amount of time it takes to accept and complete an application's task; the variability is jitter. An operating system such as hard real-time has less jitter than a soft real-time operating system. The chief design ultimatum is not high throughput, but rather a guarantee of a soft or hard performance category. An RTOS usually or generally meets a deadline is a soft real-time OS, but if it can meet a deadline deterministically it is a hard real-time OS.

An OS like real-time has an advanced algorithm for scheduling. Scheduler flexibility makes it a wider, computer-system orchestration of process priorities, but a real-time OS is more frequently dedicated to a narrow set of applications. Key factors of a real-time OS are minimal interrupt latency and minimal thread switching latency, but a real-time OS is valued more for how quickly or how predictably it can respond than for the amount of work it can perform in a given period of time.

Scheduling

In some of the typical designs, a task has three states: 1) running (executing on the CPU), 2) ready (ready to be executed), 3) blocked (waiting for input/output). Most tasks will be blocked or ready most of the time because generally only one task can run at a time per CPU. The items in the ready queue can greatly vary, depending on the number of tasks the system needs to perform and the type of scheduler that the system uses. On the basis of simpler non-preemptive but still multitasking systems, a task has to give up its time on the CPU to other tasks, which can cause the ready queue to have a greater number of overall tasks in the ready to be executed state.

Usually some of the data structures of the ready list in the scheduler are designed to minimize the worst-case length of time spent in the scheduler's critical section, during which preemption is inhibited, and, in some cases, all interrupts are disabled.